Transistor circuit having a plurality of constant current sources

ABSTRACT

A transistor circuit having a plurality of constant current sources wherein a compensating resistor of a predetermined value is inserted between the base of the transistor of one of the constant current sources and a reference voltage supply terminal. The compensating resistor serves to equalize the current variation between currents flowing through first and second resistive loads and thereby equalizes D.C. circuit output potentials for the circuits being driven by the constant current sources. This equalization is achieved irrespective of variations in transistor current gain due to temperature fluctuation or manufacturing error.

FIELD OF THE INVENTION

This invention relates to a transistor circuit having a plurality of constant current sources, and more particularly to a transistor circuit which includes a plurality of circuit portions each portion being connected to a respective constant current source wherein the D.C. potential at an output terminal of each circuit portion is required to be accurately controlled.

BACKGROUND OF THE INVENTION

A typical example of a circuit in accordance with the prior art is a color demodulator circuit in a color television receiver. This circuit includes three circuit portions which respectively demodulate color signals of red, blue and green components. The demodulator circuit further includes constant current sources, and each of the demodulating circuit portions is connected to the respective constant current sources. Each demodulating circuit portion has an output terminal from which a demodulated color signal is derived, and the D.C. potential at the output terminals of the three demodulating circuit portions is required to be the same so that highly accurate color reproduction, notably reproduction of white colors, can be secured on a screen of the color television receiver. This requirement must be met, in the prior art, by controlling relative values of the output currents of the respective constant current sources. However, it is quite difficult to accurately control the relative values of the output currents of prior art constant current sources, as is detailed hereinafter.

The relative values of the output currents, in the prior art, are determined by the value of the current gain α, or its factorial, of the transistor or transistors in the respective circuit portions connected to the constant current sources. However, since the current gain α is 0.98-0.99, i.e., nearly equal to unity, accurate control of the relative output current values is very hard and is not suited to mass-production techniques. This is especially true where the circuit is realized as a semiconductor integrated circuit. In such a circuit reliziation, accurate control is impossible. In addition, even if accurate control of the relative values of the output currents can be achieved for one specific value of the current gain α, the controlled relationship of the output D.C. potentials will be lost with variations of the current gain α due to operating temperature fluctuation or manufacturing error.

Difficulties similar to those just described will also occur in the circuit of a direct-coupled amplifier, direct-coupled modulator, direct-coupled demodulator or other circuits which generate two or more outputs and require the accurately controlled output D.C. potentials.

It is therefore a principle object of the present invention to provide a transistor circuit generating at least two output potential having accurately controlled D.C. currents.

It is another object of the present invention to provide a transistor circuit, having two or more constant current sources and generating two or more output potentials, having D.C. currents, the relation of which, is maintained irrespective of the current gain α of transistors employed.

It is still another object of the present invention to provide a transistor circuit including two or more circuit portions, each connected to a respective constant current source and generating outputs having the same D.C. potential irrespective of the current gain α of the transistor employed in the circuit portion.

According to the present invention, there is provided a transistor circuit comprising:

a power supply terminal;

a reference constant voltage supply terminal;

a first constant current source having a first transistor with a base connected to said reference constant voltage supply terminal, an emitter connected to a common potential by way of a first resistor, and a collector generating a first constant current;

a first circuit portion including a series connection of a third transistor connected to the collector of the first transistor and a first resistive load connected to the power supply terminal;

a second constant current source having a second transistor with an emitter connected to the common potential by way of a second resistor, a collector generating a second constant current, and a base connected by way of a third resistor to said reference voltage supply terminal; and

a second circuit portion including a second resistive load connected between the collector of the second transistor and the power supply terminal.

It is a feature of the invention that a compensating resistor is inserted between the base of the transistor of one of the constant current sources and the reference voltage supply terminal.

In accordance with the invention, one or more transistors may be inserted in a series-connection relationship between the thid transistor of the first circuit portion and the collector of the first transistor. Further, one or more series-connected transistors may be inserted between the second resistive load of the second circuit portion and the collector of the second transistor, provided that the number of the inserted transistor or transistors is less than that of the series-connected transistors in the first circuit portion. The resistance of the compensating resistor is determined so as to equalize the variation of the currents flowing through the first and second resistive loads. Such variation is caused by operating temperature fluctuation or manufacturing error.

It is another feature of the invention that in the case where the difference "K" in the number of transistors between the first and second circuit portions, is equal to 3, the resistance of the compensating resistor is selected so as to be "K" times as large as the resistance of the second resistor.

According to another aspect of the present invention, as will be described in more detail hereinafter, D.C. currents flowing through the first and second resistive loads may be equally affected from the first and second circuit portions irrespective of the difference in numbers of the series-connected transistors in these circuit portions. Therefore the relation of these currents is kept uniform irrespective of the variation of the current gain α of the transistor due to temperature fluctuation or manufacturing error.

It is a further feature of the invention that in the case where the resistances of the first and second resistors in the first and second constant current sources are designed to be equal to each other and where the resistances of the first and second resistive loads in the first and second circuits are designed to be equal to each other, the same D.C. voltage drop appears across the first and the second resistive loads irrespective of the variation of the current gain α due to temperature fluctuation or manufacturing error.

It is another feature of the invention that the resistance of the compensating resistor may be set to be an integral number of times as large as that of the second resistor, so that the circuit arrangement may be simplified. Although difficulty is encountered with adjustment of an absolute value, of a resistance in a semiconductor integrated circuit, it is quite easy to multiply a ratio of resistance an integral number of times, so that the present invention may be readily practiced in a semiconductor integrated circuit.

The above and other objects and features of the invention will become apparent from the following description taken in conjunction with the accompanying drawings, wherein:

FIG. 1 is a circuit diagram showing prior art constant current sources;

FIG. 2 is a circuit diagram showing a differential amplifier with the prior art constant current sources of FIG. 1;

FIG. 3 is a circuit diagram showing a differential amplifier with constant current sources according to a first embodiment of the invention;

FIG. 4 is a circuit diagram showing a color demodulator circuit for a color television receiver including constant current sources according to a second embodiment of the invention; and

FIG. 5 is a circuit diagram illustrative of the concept of the present invention.

DETAILED DESCRIPTION

FIG. 1 shows one typical example of the prior art constant current sources used in an integrated circuit, which includes transistors Q₁ and Q₂ and emitter resistors R₁ and R₂. D.C. constant voltage V₀ is impressed on the bases of the transistors Q₁ and Q₂ to obtain constant currents at their collectors.

Satisfactory matching of the electrical characteristics between elements may be achieved in a semiconductor integrated circuit having elements formed on the same semiconductor substrate. For instance, in the case where resistances r₁ and r₂ of the emitter resistors R₁ and R₂ are equal to each other, then base-emitter voltages V_(BE1) and V_(BE2) and the current gains α₁ and α₂ of the transistors Q₁ and Q₂ may be taken as being equal to each other, so that collector currents of the transistors Q₁ and Q₂ will be equalized and may be expressed as follows:

    α.sub.1 = α 2I.sub.2 = α(V.sub.0 - V.sub.BE)/r.sub.1 (1)

wherein

    V.sub.BE1 = V.sub.BE2 ≡ V.sub.BE α.sub.1 = α.sub.2 ≡ α

constant current sources which generate two well balanced currents due to the matching of elements in such an integrated circuit find an application in a direct-coupled amplifier, a modulating circuit or a demodulating circuit which requires a highly controlled D.C. output potential, with the aid of a differential amplifier, resistance loads, and the like.

FIG. 2 shows a prior art example of the constant current sources of FIG. 1, which are applied to a direct-coupled differential amplifier. In FIG. 2, a collector of a transistor Q₁ is connected to a common emitter of transistors Q₃ and Q₄, while a collector of the transistor Q₃ is connected to a power supply terminal 1, and a collector of the transistor Q₄ is connected by way of a load resistor R₃ to the power supply terminal 1. In addition, the bases of transistors Q₃, Q₄ are connected by way of resistors R_(3"), and R_(4") to a base bias terminal 2, respectively, thereby constituting a differential amplifier. The collector of the transistor Q₂ is connected by way of resistor R₄ to the power supply terminal. The first and second output terminals 3 and 4 are connected to the collectors of the transistor Q₄ and Q₂, respectively. An input signal is applied across the base terminals of transistors Q₃ and Q₄, and then derived from the output terminal 3. An output terminal D.C. potential V₁ at the time of absence of the input signal may be given by the following equation, assuming that the transistors Q₃ and Q₄ are maintained in equalibrium, and current gains thereof are equally α, as in the case of the transistors Q₁ and Q₂ : ##EQU1## wherein V_(cc) is a voltage applied to the power supply terminal 1. As can be seen from the equation (2), the output terminal D.C. potential V₁ is dependent on the potential drop between the opposite ends of the load resistors R₃ due to an output current of α² I₁ /2, which has been influenced by base currents of the transistors Q₁ and Q₄.

Turning to the other constant current source, the collector of the transistor Q₂ is connected by way of a load resistor R₄ to the power supply terminal 1, thereby supplying an output D.C. potential V₂ to an output terminal 4. Assume that a resistance r₃ = 2r₄, so that the output D.C. potentials V₁ and V₂ at the terminals 3, 4 may be nearly equal to each other, then the output D.C. potential V₂ is given as follows: ##EQU2##

In case a difference between the output D.C. potentials V₁ and V₂ is used as an output voltage, a null voltage is required for the aforesaid difference voltage, and in case the output terminals 3, 4 are directly coupled to the subsequent circuit, a highly accurate adjustment is required for the aforesaid difference voltage.

From the equations (2), (3), ##EQU3##

As in an example of FIG. 1, I₂ =I₁, then the equation (4) is given by: ##EQU4##

There may be obtained a difference voltage due to (1-- α) which is a difference of current gain α of the transistor from "1."

One attempt for reducing a difference voltage to zero is that a difference is given to the resistances r₁ and r₂ of the emitter resisstors R₁ and R₂ in a constant current source, beforehand, so that I₂ - αI₁ = 0. In this case, a difference of V_(BE) due to a difference in emitter currents may be essentially neglected, and thus the resistances are set to r₂ = r₁ /α. However, in this attempt, even if the aforesaid prerequisite is satisfied at a given value of the current gain α, the aforesaid prerequisite can no longer be satisfied, when α fluctuates. As a result, this attempt can not sufficiently compensate for variations due to manufacturing error or a variation of α due to the temperature-dependency thereof. These variatons are inevitable in the semiconductor intergrated circuits. Further, since the current gains in general fall in a range of 0.98 to 0.99, it is quite difficult to derive a resitance ratio, r₁ r₂ = α, with high accuracy.

FIG. 3 shows a first embodiment, in which the present invention is applied to the case of FIG. 2. A resistor R₅ is additionally inserted between the source of the D.C. constant voltage V₀ and the base of the transistor Q₂ in the circuit of FIG. 2. A base current (1 - α)I₂ of the transistor Q₂ flows through the resistor R₅ (resistance r₅), so that an equation for constant currents I₁ and I₂ is given as follows:

    V.sub.0 = V.sub.BE1 + I.sub.1 r.sub.1 = V.sub.BE2 + (1- α) I.sub.2 r.sub. 5 + I.sub.2 r.sub.2 . . . .                        (6)

Assume that r₁ = r₂, then a difference between base-emitter voltages V_(BE1) and V_(BE2), due to a difference between I₁ and I₂, may be neglected, so that equation (6) may be simplified into the following equation (6'):

    I.sub.2 r.sub.1 =I.sub.1 r.sub.1 -(1- α)I.sub.2 r.sub.5 (6)' 3

Assume that the resistance r₅ of the resistor R₅ is r₅ =I₁ /I₂ r₁, then the equation (6') will be I₂ =αI₁. This means that the relation I₂ - αI₁ = 0 is realized and the aforesaid equation (4) is kept to zero. The above relationship may be established, irrespective of the fluctuation in absolute value of a current gain α, as long as the current gains α of the respective transistor constituting the circuit of FIG. 3 are all equal to each other, with the result that a difference voltage between the output D.C. voltages V₁ and V₂ may be nullified, irrespective of the value of current gain α of the transistor. The condition r₅ = I₁ /I₂ × r₁ = 1/α r₁ may be approximated to r₅ = r₁, so that resistances r₁, r₂ and r₅ of the resistors R₁, R₂ and R₅ may be made equal. In addition, uniformity in electrical characteristics of elements in a semiconductor integrated circuit may be easily attained, so that the difference voltage may be easily nullified, irrespective of a variation in current gain α of transistors in the integrated circuit due to manufacturing error, or fluctuation of electrical characteristics due to temperature dependency, as has been described earlier. The resistances r₁, r₂ and r₅ are only required to be equal, which can be easily met when manufacturing a semiconductor integrated circuit.

FIG. 4 shows a circuit diagram of a second embodiment of the present invention, in which the present invention is applied to color demodulation circuits in a color television receiver. In FIG. 4, there is illustrated a power source terminal 11, supplying a power voltage V_(cc), an (R-Y) demodulation circuit block 5, consisting of transistors Q₂₁ and Q₂₃ L to Q₂₈, and resistors R₂₁, R₂₃, R₂₆ and R₂₇, a (B-Y) demodulation circuit block 6, consisting of transistors Q₃₁ and Q₃₃ to Q₃₈, and resistor R₃₁, R₃₃, R₃₆ and R₃₇, (G-Y) demodulation circuit block 7, consisting of transistors Q₂₂, and resistors R₂₂, R₂₅, R₁₄, R₂₄ and R₃₄, an (R-Y) demodulated signal output terminal 23, a (B-Y) demodulated signal output terminal 13, and a (G-Y) demodulated signal output terminal 14. D.C. constant voltage V₀ is impressed on transistors Q₂₁, Q₂₂ and Q₃₁, respectively, thus serving as constant current source for producing constant currents from the collectors of the above transistors. Emitters of transistors Q₂₃ and Q₂₄ are connected to the collector of transistor Q₂₁ by way of emitter resistors R₂₆ and R₂₇ and emitters of transistors Q₃₃ and Q₃₄ are conected to the collector of transistor Q₃₁ by way of emitter resistors R₃₆ and R₃₇. Transistors Q₂₃ and Q₂₄ and transistors Q₃₃ and Q₃₄ constitute first differential amplifiers, respectively. A carrier chrominance signal is applied across the bases of transistors Q₂₃ and Q₂₄ as well as across the bases of transistors Q₃₃ and Q₃₄. Connected to the collectors of the transistors Q₂₃ and Q₂₄ is a second stage differential amplifier consisting of transistors Q₂₅, Q₂₆, Q₂₇ and Q₂₈, as well as the collectors of the transistors Q₃₃ and Q₃₄ to another second stage differential amplifier consisting of transistors Q₃₅, Q₃₆, Q₃₇ and Q₃₈, so that the aforesaid carrier chrominance signal may be demodulated by a reference signal. The color difference signals thus demodulated are derived through output terminals 23 and 13 from one end of each of load resistors R₂₃ and R₃₃. More particularly, an (R-Y) demodulation output signal having a D.C. potential V₂₃ is derived at the outut terminals 23, while a (B-Y) demodulation signal having a D.C. potential V₁₃ is derived from the output terminal 13. On the other hand, the other outputs of the second stage differential amplifiers are impressed on the junctions of resistors R₁₄, R₃₄ and R₂₄, connected in series to a collector of the transistor Q₂₂, so that these outputs are synthesized, and then a (G-Y) demodulation output signal having a D.C. potential V₁₄ is derived from the output terminal 14. A resistor R₂₅ is inserted so as to equalize the D.C. potentials of output terminals 23, 13 and 14 with each other, as will be described in detail hereinafter. In the color demodulator in FIG. 4, one of the functions required is to maintain equality between the D.C. potentials at the three output terminals 23, 13 and 14. However, this functon directly effects the color reproduction, particularly white reproduction on a screen of a color television receiver, so that equality of the D.C. potentials of an extremely high accuracy is required. A.D.C. potential V₂₃ at the (R-Y) output terminal 23 and a D.C. potential V₁₃ at the (B-Y) output terminal 13 may be given by the following equation, assuming that the current gains of transistors in the circuit are all equal to a gain α, the resistances of the resistors R₂₃ and R₃₃ are r₂₃ and r₃₃, respectively, and currents flowing through the resistors R₂₁ and R₃₁ are I₂₁ and I₃₁, respectively: ##EQU5##

In case the respective resistances r₂₁ and r₃₁ of the emitter resistors R₂₁ and R₃₁ are set to be equal to each other so as to provide the relationships r₂₃ = r₃₃, and I₂₁ =I₃₁, then V₂₃ = V₁₃ may be maintained.

A D.C. potential V₁₄ at the (G-Y) output terminal 14 may be given by the following equation for D.C. potentials at the output terminals 23 and 13 under the condition I₂₁ = I₃₁ : ##EQU6## Signals I₂₁ and I₂₂ are currents flowing through the resistors R₂₁ and R₂₂, and r₂₁, r₃₄, r₁₄ and r₂₄ are resistances of the resistors R₂₁, R₃₄, R₁₄ and R₂₄, respectively. If the relationship, I₂₂ = α². I₂₁ may be maintained, where I₂₂ is a current flowing through the resistor R₂₂, so as to supply a constant current to the (G-Y) matrix, then the equality amount the D.C. potentials V₂₃, V₁₄ and V₁₃ at the three output terminals 23, 14 and 13 may be established (i.e., V₂₃ = V₁₃) by setting the relationship of resistances in a manner that 3r₃₄ + 2r₁₄ + r₂₄ = r₂₃. The aforesaid relationship I₂₂ = α² I₂₁ may be maintained by suitably determining the resistance r₂₅ of the resistor R₂₅ which has been inserted into the base of the transistor Q₂₂, as in the case of FIG. 3. Assume that

r₂₅ = (1 + α) I₂₁ /I₂₂)· r₂₁,

and then the equation (6) is substituted thereby, so that

    I.sub.22 r.sub.21 = I.sub.21 r.sub.21 - (1--α)(1++ α) I.sub.21 r.sub.21                                                  (10)

Accordingly,

    I.sub.22 = I.sub.21 - I.sub.21 + α.sup.2 I.sub.21 = α.sup.2 I.sub.21                                                  (11)

thus, a constant current may be obtained, satisfying the aforesaid prerequisite.

The resistance

    r.sub.25 = (1 +α) (I.sub.21 /I.sub.22) r.sub.21 = (1+ α) (r.sub.21 /.sub.α 2)

thus

obtained provides the same results as above, even if r₂₅ = 2r₂₁. Thus, it suffices to insert the resistor R₂₅, whose resistance r₂₅ is set to a resistance of r₂₅ = 2 r₂₁, thereby readily achieving the intended objective.

As mentioned above, an output current of a constant current source can be controlled by inserting a resistor between the constant voltage source and the base of the transistor. This results in output potential of a circuit portion, driven by a constant current source, being easily controlled. Similarly the output potentials of other circuit portions, wherein the number of transistors are different from each other and which are driven by respective constant current sources, may be kept equal to each other irrespective of the change in the current gain α due to manufacturing error and/or the fluctuation of the operating temperature. The circuit arrangement to obtain such a result is very simple and is suitable for fabrication with a semiconductor integrated circuit.

FIG. 5 is a circuit diagram illustrative of the present invention. In FIG. 5, a circuit portion 50, which is a D.C. equivalent to a series connection of transistors of `N` number, is connected to a constant current source including a transistor Q₅₁. In this respect, a differential amplifier consisting of transistors Q₃, Q₄ of FIG. 3 and a double balanced differential circuit consisting of transistors Q₂₃ to Q₂₈ of FIG. 4 corresponds to this circuit portion 50, respectively. In FIG. 3, N is equal to 1, and in FIG. 4, N equals 2. Accordingly, a first output current I₅₀ from the circuit portion 50 is affected by a base current from `N` transistors, and thus may be derived as a current proportional to α^(N+1)· I₅₁. In the circuit of FIG. 5, another circuit portion 60, which is a D.C. equivalent to the series connection of (N-K) transistors, is connected to another constant current source including a transistor Q₅₂. The resistor R₄ in FIG. 3 and the series connection of the resistor R₁₄, R₂₄ and R₃₄ in FIG. 4 correspond respectively to the circuit portion 60. In these examples, N-K= 0. In order that the second output current I₆₀ from the circuit portion 60 is influenced by the base currents of `N` transistors, under the condition of K= 1, the output current from the collector of the transistor Q₅₂ has to compensate by the additional resistor R₅₅ so as to be influenced by the base currents of `K` transistors.

The resistance r₅₅ of the resistor R₅₅ will now be calculated. The relation of the currents I₅₁ and I₅₂ flowing through the resistors R₅₁ and R₅₂ can be expressed as follows:

    r.sub.51 · I.sub.51 = r.sub.55· (1-α)I.sub.52 + r.sub.52 ·I.sub.52                               (12)

    α.sup.n+1 · i.sub.51 = r.sub.52 /r.sub.51 · α.sup.N-K+1 I.sub.52                                (13)

where r₅₂, r₅₂ and r₅₅ denote the resistances of the resistors R₅₁, R₅₂ and R₅₅, respectively.

From equation (12), ##EQU7## By inserting I₅₂ of equation (14) into equation (13), ##EQU8## Therefore, ##EQU9##

For instance, in the case where α = 0.98 (coresponding to an emitter grounded current gain of 49), from the equation (17), the following results are obtained:

When K= 1,

r.sub. 55 = (1/α) r₅₂ = 1.02 r₅₂

When K= 2,

    r.sub.55 = (1+α/.sub.60 2) r.sub.52 = 2.06 r.sub.52

When K= 3,

    r.sub. 55 = (1+ α + α.sup.2 /.sub.α 3 · r.sub.52 = 3.12 r.sub.52

Therefore, it follows that in the range of K= 1 to 3 the resistance r₅₅ can be practically selected to be about `K` times as large as the resistance r₅₂.

Description has been given thus far of a circuit arrangement, in which compensating resistors R₅, R₂₅ and R₅₅ are inserted in the constant current source, assuming that the resistances r₁, r₂₁ and r₅₁ of the emitter resistors R₁, R₂₁ and R₅₁ are equal to r₂, r₂₂ and r₅₂ of the emitter resistors R₂, R₂₂ and R₅₂. However, it would be apparent from the above calculation that the resistances of the emitter resistors should not necessarily be equal to each other, in contrast to the above embodiments. Generally, the compensating resistor has a function corresponding to the addition of the series connection of transistors to the constant current source. Therefore, in the case where some circuit portions, each having a different number of series connected transistors are driven by the respective constant current sources, the relationship of the respective output currents of these circuit portions can be compensated so as to be equal irrespective of the current gain α of the transistors, by use of the compensating resistor of the invention. In the special case, such as the above embodiments, the output potentials of the plural number of circuit portions can be made equal to each other.

It would be also apparent that, in order to obtain the same result, a plural number of compensating resistors can be inserted in the bases of some constant current sources, rather than into one constant current source.

Although specific embodiments of this invention have been shown and described, it will be understood that various modifications may be made without departing from the spirit of this invention. 

I claim:
 1. A transistor circuit comprising:a power supply terminal; a grounding terminal; a reference constant voltage supply terminal; a first constant current source having a first transistor with a base, an emitter and a collector, said base being connected to said reference constant voltage supply terminal, and a first resistor connected between said emitter of said first transistor and said grounding terminal, thereby generating a first constant current from said collector of said first transistor; a first sub-circuit driven by said first constant current generated from said first constant current source; and including a first series connection of N transistors, N being a positive integer of no less than 1, and a first resistive load inserted between said first series connection and said power supply terminal; a second constant current source having a second transistor with a base, an emitter and a collector, a second resistor connected between said emitter and said grounding terminal, and a compensating resistor inserted between said reference constant voltage supply terminal and said base, thereby generating a second constant current from said collector of said second transistor, said compensating resistor having a resistance K times as large as the resistance of said second resistor, where k is a positive integer between 1 and N, and a second sub-circuit driven by said second constant current generated from said second constant current source and including a second series connection of (N-K) transistors and a second resistive load inserted between one end of said second series connection and said power supply terminal, the voltage drop across said second resistive load being approximately the same value as the voltage drop across said first resistive load.
 2. A transistor circuit in accordance with claim 1, wherein said first resistor and said second resistor have the same resistance and said first resistive load and said second resistive load are resistors of the same resistance value.
 3. A transistor circuit in accordance with claim 1, wherein said number K of said second series connection is an integer between 1 and 3 and said compensating resistor has a resistance being K times as large as the resistance of said second resistor.
 4. A transistor circuit in accordance with claim 2, wherein said number K of said second series connection is an integer between 1 and 3 and said compensating resistor has a resistance being K times as large as the resistance of said second resistor.
 5. A transistor circuit comprising:a power supply terminal, a reference voltage supply terminal, a common potential terminal,a first constant current source having a first transistor with a base, an emitter and a collector, said base being connected to said reference voltage supply terminal, and a first resistor connected between said emitter of said first transistor and said common potential terminal, a second constant current source having a second transistor with a base, an emitter and a collector, and a second resistor connected between said emitter of said second transistor and said common potential terminal, a first circuit portion having a series connection of a first load means and a third transistor, and being connected betweeen said power supply terminal and said first constant current source, a second circuit portion having a second load means and being connected between said power supply terminal and said second constant current source, and a third resistor connected between said reference voltage supply terminal and said base of said second transistor, said third resistor having a resistance K times a lage as the resistance of said second load means, thereby generating a D.C. voltage drop across said second load means, said D.C. voltage drop having approximately the same value as the voltage drop across said first load means.
 6. A transistor circuit in accordance with claim 5, wherein said first circuit portion further includes at least one transistor connected in series between said third transistor and said first constant current source.
 7. A transistor circuit in accordance with claim 6, wherein said second circuit portion further includes at least one transistor connected in series between said second load means and said second constant current source, the number of series connected transistors in said second circuit portion being less than the number of series-connected transistors in said first circuit portion. 